Anti-fuse memory device
US12387804B2 · kind B2 · utility
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1References
18Claims
0Family size
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Key dates
| Filing date | Sep 20, 2023 |
| Grant date | Aug 12, 2025 |
| Priority date | — |
| Expiry date | Mar 7, 2044 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An anti-fuse memory device includes an anti-fuse module, a reference current circuit and a controller. A write enable signal enables a write controller and a write buffer of the anti-fuse module to program a selected anti-fuse memory cell in an anti-fuse array of the anti-fuse module, and a timing controller of the anti-fuse module stops a program operation of the anti-fuse array after a sense amplifier of the anti-fuse module changes a state of a readout data signal for a predetermined time duration.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.