Patent · US Active

Three-dimensional memory device and method for forming the same

US12389603B2 · kind B2 · utility

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20Claims
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Assignee

Inventors

Key dates

Filing dateJun 22, 2022
Grant dateAug 12, 2025
Priority date
Expiry dateApr 5, 2044

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10B43/27

Abstract

A three-dimensional (3D) memory device includes a plurality of memory stacks arranged along a first direction, and a dummy block structure disposed between two adjacent memory stacks. Each memory stack includes a plurality of first conductive layers and a plurality of first dielectric layers alternately stacked along a second direction perpendicular to the first direction. A channel structure extends through the plurality of first conductive layers and the plurality of first dielectric layers along the second direction. A first isolation structure is disposed between the dummy block structure and one of the plurality of memory stacks. A substrate is disposed under the plurality of memory stacks, the dummy block structure, and the first isolation structure. A second isolation structure is disposed in the substrate extending along the second direction.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.