Semiconductor devices and methods of fabricating the same
US12389653B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 13, 2022 |
| Grant date | Aug 12, 2025 |
| Priority date | — |
| Expiry date | Sep 13, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0188
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Semiconductor devices and methods are provided. An exemplary method according to the present disclosure includes providing fin-shaped active regions protruding from a substrate, forming cladding layers extending along sidewalls of the fin-shaped active regions, forming a dielectric feature over the substrate to fill space between two adjacent cladding layers, forming a gate structure over channel regions of the fin-shaped active regions and over a first portion of the cladding layers, performing an etching process to remove a second portion of the cladding layers not covered by the gate structure to form sidewall spacer trenches, forming a dielectric spacer in each of the sidewall spacer trenches, and after the forming of the dielectric spacers, forming source/drain features.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.