Ming-Lung Cheng
24Patents
4h-index
28Co-inventors
59Inventor score
Filing activity: May 14, 2010 → Jun 19, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8729627B2 | Strained channel integrated circuit devices | Electricity | 558 | Active |
| US9768277B2 | Method and apparatus of forming an integrated circuit with a strained channel region | Electricity | 8 | Active |
| US8357579B2 | Methods of forming integrated circuits | Electricity | 7 | Active |
| US9105664B2 | Method for enhancing channel strain | Electricity | 5 | Active |
| US10522417B2 | FinFET device with different liners for PFET and NFET and method of fabricating thereof | Electricity | 3 | Active |
| US11217679B2 | Semiconductor device and method | Electricity | 1 | Active |
| US12154946B2 | Semiconductor device structure | Electricity | 1 | Active |
| US12389653B2 | Semiconductor devices and methods of fabricating the same | Electricity | 0 | Active |
| US11600695B2 | Dielectric fins with air gap and backside self-aligned contact | Electricity | 0 | Active |
| US11688767B2 | Semiconductor device structure and method for forming the same | Electricity | 0 | Active |
| US8951875B2 | Semiconductor structure | Electricity | 0 | Active |
| US11810827B2 | FinFET device with different liners for PFET and NFET and method of fabricating thereof | Electricity | 0 | Active |
| US12012297B2 | Avoidance conveying device and method for glass production line | Emerging Cross-Sectional Technologies | 0 | Active |
| US12278276B2 | Multi-channel devices and method with anti-punch through process | Electricity | 0 | Active |
| US12414331B2 | Isolation for multigate devices | Electricity | 0 | Active |
| US12191370B2 | Semiconductor device with tunable channel layer usage and methods of fabrication thereof | Electricity | 0 | Active |
| US11837631B2 | Source/drain spacer with air gap in semiconductor devices and methods of fabricating the same | Performing Operations; Transporting | 0 | Active |
| US11031299B2 | FinFET device with different liners for PFET and NFET and method of fabricating thereof | Electricity | 0 | Active |
| US12142668B2 | Semiconductor device and method | Electricity | 0 | Active |
| US12396234B2 | Method for forming semiconductor device structure with a cap layer | Electricity | 0 | Active |
| US12324218B2 | Semiconductor devices with air gaps and the method thereof | Electricity | 0 | Active |
| US11688768B2 | Integrated circuit structure with source/drain spacers | Electricity | 0 | Active |
| US11505489B2 | Isothermal drop speed cooling method of forced convection area for lehr and the apparatus thereof | Chemistry; Metallurgy | 0 | Active |
| US12166071B2 | Dielectric fins with air gap and backside self-aligned contact | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.