Semiconductor structure and method of forming semiconductor structure

US12389673B2 · kind B2 · utility

Assignees

• Semiconductor Manufacturing International (Shanghai) Corporation · CN
• Semiconductor Manufacturing International (Beijing) Corporation · CN

Inventors

• Jian Chen · Austin, US
• Shiliang JI · Shanghai, CN
• Haiyang Zhang · Shanghai, CN

Key dates

• Filing date: Dec 27, 2023
• Grant date: Aug 12, 2025
• Expiry date: Dec 27, 2043

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/85
• WIPO field: Micro-structural and nano-technology
• WIPO sector: Chemistry

Abstract

Semiconductor structure and method of forming semiconductor structure are provided. The semiconductor structure includes a substrate, a first isolation structure, and a first nanostructure and a second nanostructure on two sides of the first isolation structure. The semiconductor structure also includes a second isolation structure, and a third nanostructure and a fourth nanostructure on two sides of the second isolation structure. A top of the second isolation structure is lower than a top of the first isolation structure. The semiconductor structure also includes a first gate structure and a second gate structure. The first gate structure and the second gate structure expose a top surface of the first isolation structure. The semiconductor structure also includes a third gate structure and a fourth gate structure. The third gate structure and the fourth gate structure are in contact with each other on a top surface of the second isolation structure.