Jian Chen
19Patents
5h-index
39Co-inventors
66Inventor score
Filing activity: Jul 20, 1998 → Dec 27, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6864135B2 | Semiconductor fabrication process using transistor spacers of differing widths | Electricity | 69 | Expired |
| US6049114A | Semiconductor device having a metal containing layer overlying a gate dielectric | Emerging Cross-Sectional Technologies | 56 | Expired |
| US7575975B2 | Method for forming a planar and vertical semiconductor structure having a strained semiconductor layer | Emerging Cross-Sectional Technologies | 22 | Active |
| US7125805B2 | Method of semiconductor fabrication incorporating disposable spacer into elevated source/drain processing | Electricity | 9 | Expired |
| US7064396B2 | Integrated circuit with multiple spacer insulating region widths | Electricity | 7 | Expired |
| US7161199B2 | Transistor structure with stress modification and capacitive reduction feature in a width direction and method thereof | Electricity | 5 | Expired |
| US7276406B2 | Transistor structure with dual trench for optimized stress effect and method therefor | Electricity | 5 | Expired |
| US7074713B2 | Plasma enhanced nitride layer | Electricity | 3 | Expired |
| US9466522B2 | Method for fabricating semiconductor structure | Electricity | 3 | Active |
| US7615806B2 | Method for forming a semiconductor structure and structure thereof | Electricity | 3 | Active |
| US8269912B2 | Display device for preventing electromagnetic interference | Physics | 1 | Active |
| US11881480B2 | Semiconductor structure and method of forming semiconductor structure | Electricity | 1 | Active |
| US7288447B2 | Semiconductor device having trench isolation for differential stress and method therefor | Electricity | 1 | Expired |
| US8179683B2 | Display device | Physics | 0 | Active |
| US6503814B2 | Method for forming trench isolation | Electricity | 0 | Expired |
| US11439871B2 | System and method for rehabilitation | Human Necessities | 0 | Active |
| US12384562B2 | System and method for capturing space target | Performing Operations; Transporting | 0 | Active |
| US12389673B2 | Semiconductor structure and method of forming semiconductor structure | Electricity | 0 | Active |
| US11211475B2 | Semiconductor device and formation method thereof | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.