Nonvolatile memory device and memory system including the same
US12394460B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 31, 2023 |
| Grant date | Aug 19, 2025 |
| Priority date | — |
| Expiry date | Oct 31, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/021
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided is a nonvolatile memory including a receive buffer configured to generate a buffer signal by comparing an input signal with a reference voltage, a reference voltage calibrator configured to generate a calibrated reference voltage code signal based on a reference voltage code signal and the buffer signal, and a reference voltage generator configured to generate a reference voltage corresponding to the calibrated reference voltage code signal. In addition, the read reference voltage calibrator includes a duty cycle monitor configured to generate a monitoring signal by measuring a duty cycle of the buffer signal, an up/down counter configured to generate a count number signal by comparing a reference duty cycle with a measurement duty cycle corresponding to the monitoring signal, and a code calculator configured to generate the calibrated reference voltage code signal based on the count number signal and the reference voltage code signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.