Efficient bitline stabilization for program inhibit in NAND arrays
US12394497B2 · kind B2 · utility
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18Claims
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Key dates
| Filing date | Dec 23, 2023 |
| Grant date | Aug 19, 2025 |
| Priority date | — |
| Expiry date | Dec 23, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/24
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A storage device charges bitlines in preparation for a program pulse. To charge the bitlines, the storage device connects the bitlines to an external regulator instead of an internal regulator to prepare them for the program pulse. The system can charge all bitlines to the external regulator high voltage reference before changing to the internal regulator for bitline stabilization before the program pulse.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.