Secure replaceable verification key architecture in a memory sub-system
US12395349B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Aug 18, 2022 |
| Grant date | Aug 19, 2025 |
| Priority date | — |
| Expiry date | Aug 18, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L9/3268
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A processing device receives, from a host system, a key manifest and a digital signature generated based on the key manifest using a private key corresponding to a public/private key pair. The key manifest comprises one or more verification keys. The digital signature is verified using the public key and the processing device stores the key manifest in a persistent storage component in response to successful verification of the digital signature. The one or more verification keys are utilized in one or more verification operations based on the key manifest being stored in the persistent memory component.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.