Memory structure and manufacturing method thereof, and semiconductor structure
US12396156B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 3, 2022 |
| Grant date | Aug 19, 2025 |
| Priority date | — |
| Expiry date | Feb 25, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to a memory structure and a manufacturing method thereof, and a semiconductor structure. The semiconductor structure includes an epitaxial structure, a grounding structure, a columnar capacitor structure, a bit line structure, and a word line structure. The grounding structure wraps one end of the epitaxial structure in a first direction; the columnar capacitor structure wraps the other end of the epitaxial structure in the first direction; the bit line structure surrounds the epitaxial structure, and is located between the grounding structure and the columnar capacitor structure; and the word line structure surrounds the epitaxial structure, and is located between the bit line structure and the columnar capacitor structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.