Method for forming semiconductor device structure with a cap layer
US12396234B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 15, 2022 |
| Grant date | Aug 19, 2025 |
| Priority date | — |
| Expiry date | Sep 1, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0149
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a semiconductor device structure includes forming nanostructures over a substrate. The method also includes forming a work function layer surrounding the nanostructures. The method also includes forming spacers over opposite sides of the work function layer. The method also includes forming a first metal layer over the work function layer and sidewalls of the spacers. The method also includes forming a second metal layer surrounded by the first metal layer. The method also includes etching the first metal layer over opposite sides of the second metal layer. The method also includes forming a cap layer over a top surface and a sidewall of the second metal layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.