Modifying scan patterns to enable broadcasting a scan enable signal to multiple circuit blocks
US12406122B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 11, 2022 |
| Grant date | Sep 2, 2025 |
| Priority date | — |
| Expiry date | Apr 14, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/01
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A first scan pattern may be received to test a first circuit block in an integrated circuit (IC) design and a second scan pattern may be received to test a second circuit block in the IC design. A first length of the first scan pattern may be different from a second length of the second scan pattern. The first scan pattern, the second scan pattern, or both the first scan pattern and the second scan pattern may be modified to make lengths of the first scan pattern and the second scan pattern equal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.