Vertex index routing for two level primitive batch binning
US12406425B2 · kind B2 · utility
0Cited by
7References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 27, 2022 |
| Grant date | Sep 2, 2025 |
| Priority date | — |
| Expiry date | Nov 16, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T2210/52
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques for performing rendering operations are disclosed herein. The techniques include in a coarse binning pass, generating a sorted set of draw calls, based on geometry processed through a world space pipeline and vertex indices obtained from an input assembler. The techniques also include initiating a fine binning pass in which the sorted set of draw calls is processed through the world-space pipeline and the screen-space pipeline.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.