Method for preparing semiconductor device structure with energy removable spacers
US12406855B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 11, 2022 |
| Grant date | Sep 2, 2025 |
| Priority date | — |
| Expiry date | Jun 3, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31127
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for preparing a semiconductor device structure includes forming a target layer over a semiconductor substrate, and forming a plurality of first mask patterns over the target layer. The method also includes forming a plurality of energy removable spacers on opposite sidewalls of each of the first mask patterns, and forming a second mask pattern over the target layer and between the energy removable spacers. The method further includes removing the energy removable spacers, and etching the target layer using the first mask patterns and the second mask pattern as a mask.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.