Deep trench isolation structure and methods for fabrication thereof

US12408448B2 · kind B2 · utility

Assignee

• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

• Bi-Shen Lee · Hsinchu, TW
• Chia-Wei Hu · New Taipei, TW
• Hai-Dang Trinh · Hsinchu, TW
• Min-Ying Tsai · Kaohsiung, TW
• Ching-I Li · Tainan, TW
• Hsun-Chung Kuang · Hsinchu, TW
• Cheng-Yuan Tsai · Taipei, TW

Key dates

• Filing date: Jun 13, 2022
• Grant date: Sep 2, 2025
• Expiry date: Sep 3, 2043

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10F39/807

Abstract

A Deep Trench Isolation (DTI) structure is disclosed. The DTI structures according to embodiments of the present disclosure include a composite passivation layer. In some embodiments, the composite passivation layer includes a hole accumulation layer and a defect repairing layer. The defect repairing layer is disposed between the hole accumulation layer and a semiconductor substrate in which the DTI structure is formed. The defect repairing layer reduces lattice defects in the interface, thus, reducing the density of interface trap (DIT) at the interface. Reduced density of interface trap facilitates strong hole accumulation, thus increasing the flat band voltage. In some embodiments, the hole accumulation layer according to the present disclosure is enhanced by an oxidization treatment.