Patent · US Active

Advanced initialization bus (AIB)

US12411778B2 · kind B2 · utility

0Cited by
3References
18Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 29, 2024
Grant dateSep 9, 2025
Priority date
Expiry dateMay 29, 2044

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F13/4291
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Methods and systems for an advanced initialization bus (AIB) are presented. In an aspect, an AIB master sends, to an AIB slave, a serial clock over a first signal line, and performs a read operation with the AIB slave. Performing the read operation comprises sending a read command to the AIB slave via a bus comprising at least one bidirectional input/output (I/O) channel, each I/O channel having its own respective signal line, sending a read address to the AIB slave via the bus, receiving a copy of the serial clock from the AIB slave over a second signal line, and latching read data provided by the AIB slave via the bus into a read buffer using the copy of the serial clock as a data strobe. Thus, the AIB master latches the read data provided by the AIB slave using a read strobe also provided by the AIB slave.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.