Silicon oxide gap fill using capacitively coupled plasmas
US12412741B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 18, 2020 |
| Grant date | Sep 9, 2025 |
| Priority date | — |
| Expiry date | Jun 7, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31116
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Exemplary deposition methods may include introducing a precursor into a processing region of a semiconductor processing chamber via a faceplate of the semiconductor processing chamber. The methods may include flowing an oxygen-containing precursor into the processing region from beneath a pedestal of the semiconductor processing chamber. The pedestal may support a substrate. The substrate may define a trench in a surface of the substrate. The methods may include forming a first plasma of the precursor in the processing region of the semiconductor processing chamber. The methods may include depositing a first oxide film within the trench. The methods may include forming a second plasma in the processing region. The methods may include etching the first oxide film, while flowing the oxygen-containing precursor. The methods may include re-forming the first plasma in the processing region. The methods may also include depositing a second oxide film over the etched oxide film.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.