Method for manufacturing memory device having word line with dual conductive materials
US12414292B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 16, 2022 |
| Grant date | Sep 9, 2025 |
| Priority date | — |
| Expiry date | Oct 3, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/518
Abstract
The present application provides a method for manufacturing a memory device having a word line (WL) with dual conductive materials. The method includes steps of providing a semiconductor substrate with an active area defined adjacent to a surface of the semiconductor substrate; forming a recess extending from the surface into the semiconductor substrate; disposing a first insulating layer conformal to the recess; disposing a first conductive material within the recess and surrounded by the first insulating layer; removing a portion of the first conductive material to form a first conductive member; disposing a second insulating layer within the recess and conformal to the first insulating layer and the first conductive member; and disposing a second conductive material within the recess and surrounded by the second insulating layer to form a second conductive member adjacent to the first conductive member.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.