Semiconductor structure, method for forming same, and layout structure
US12419038B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 28, 2022 |
| Grant date | Sep 16, 2025 |
| Priority date | — |
| Expiry date | Jan 26, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6757
Abstract
Embodiments of the disclosure provide a semiconductor substrate, a method for forming same, and a layout structure. The method includes: providing a semiconductor structure including a first region and a second region arranged in sequence along a second direction, the second region including active structures arranged in an array along a first direction and a third direction, each of the active structure at least including a channel structure, the first direction, the second direction, and the third direction being perpendicular to each other, and the first direction and the second direction being parallel to a surface of the semiconductor substrate; forming a gate structure on a surface of the channel structure; and forming a word line structure extending in the first direction on the first region. The word line structure is connected with the gate structure located on the same layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.