Shadow tag management for accelerator partitions
US12423241B1 · kind B1 · utility
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20Claims
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Key dates
| Filing date | Dec 28, 2022 |
| Grant date | Sep 23, 2025 |
| Priority date | — |
| Expiry date | Apr 4, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/1016
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The disclosed computer-implemented method includes interleaving a plurality of caches corresponding to a plurality of chiplets, identifying a source chiplet ID of a memory request of a new address for the interleaved caches, and storing, using an indexing scheme that incorporates the source chiplet ID, a shadow tag for a cache of the interleaved caches corresponding to the memory request. Various other methods, systems, and computer-readable media are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.