Method for controlling a memory system, a memory system, and an electronic device
US12424283B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 7, 2023 |
| Grant date | Sep 23, 2025 |
| Priority date | — |
| Expiry date | Feb 22, 2044 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/26
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In examples, a method of controlling a memory system comprises obtaining a first soft-bit data corresponding to a hard-bit data read from a memory and a first lookup table, where the first lookup table comprises a first log-likelihood ratio determined based on a first reference read voltage of the memory. The method comprises performing a first soft decoding operation according to the first log-likelihood ratio and the first soft-bit data. The method comprises performing at least one shift to the first log-likelihood ratio and performing a second soft decoding operation according to a log-likelihood ratio after each shift and the first soft-bit data when the first soft decoding operation is determined to have failed to decode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.