Self-aligned contact for embedded memory
US12424492B2 · kind B2 · utility
0Cited by
6References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 20, 2022 |
| Grant date | Sep 23, 2025 |
| Priority date | — |
| Expiry date | Dec 4, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8833
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit device includes a first bit line structure that has a horizontal portion and a vertical portion in which an upper surface of the vertical portion is exposed for making electrical contact with a contact that, in turn, is in electrical contact with a metal pattern through which operating voltages may be applied to the bit line structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.