Three-dimensional memory device
US12424545B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 17, 2022 |
| Grant date | Sep 23, 2025 |
| Priority date | — |
| Expiry date | Feb 23, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B51/20
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A three-dimensional memory device includes a first electrode structure and a second electrode structure extending in a first direction, being adjacent to each other in a second direction intersecting with the first direction, and each including a plurality of electrode layers and a plurality of interlayer dielectric layers which are alternately stacked on a source plate; a plurality of first slimming holes formed in the first electrode structure to expose pad regions of the electrode layers of the first electrode structure, and arranged in the first direction; and a plurality of second slimming holes formed in the second electrode structure to expose pad regions of the electrode layers of the second electrode structure, and arranged in the first direction, wherein a first slimming hole and a second slimming hole which are adjacent in the second direction have different depths.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.