Transmitter driver circuit
US12425048B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 15, 2023 |
| Grant date | Sep 23, 2025 |
| Priority date | — |
| Expiry date | Dec 26, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/018514
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A level-shiftless transmitter includes a transmitter driver circuit. The transmitter driver circuit includes a first PMOS device, a second PMOS device, a first NMOS device, a second NMOS device, and a sub-circuit. The sources of the first and second PMOS devices are electrically coupled with each other. The gates of the first PMOS and the first NMOS devices are electrically coupled with each other. The gates of the second PMOS and the second NMOS devices are electrically coupled with each other. The sub-circuit is electrically coupled with a voltage domain to provide a voltage lower than the voltage domain to the sources of the first and second PMOS devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.