Semiconductor structure and manufacturing method thereof
US12426328B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 19, 2022 |
| Grant date | Sep 23, 2025 |
| Priority date | — |
| Expiry date | Mar 5, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/105
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present disclosure relate to the field of semiconductors, and provide a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes: an active pillar, where the active pillar includes: a channel region, as well as a first doped region and a second doped region located at two sides of the channel region, the channel region, the first doped region, and the second doped region having a same doping type, where a counter-doped region is arranged in the channel region, the counter-doped region is close to the first doped region, and a doping type of the counter-doped region is different from a doping type of the channel region; and a gate, where the gate surrounds a part of the channel region, and in a plane in which an axis of the active pillar is located, projection of the gate partially overlaps with projection of the counter-doped region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.