Memory controller for controlling communication with host and method of operating the same
US12430244B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 19, 2023 |
| Grant date | Sep 30, 2025 |
| Priority date | — |
| Expiry date | Oct 3, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7205
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present technology relates to an electronic device. According to the present technology, a memory controller may include a garbage collection controller and a sustain detector. The garbage collection controller may generate garbage collection information including valid page count values of victim memory blocks on which garbage collection is to be performed among a plurality of memory blocks included in a memory device. The sustain detector in communication with the garbage collection controller may generate sustain information indicating whether random write performance for the memory device is in a sustain state in which a random write performance value related to a capability of the random write performance is greater than or equal to a threshold value based on the garbage collection information.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.