Strained semiconductor monocrystalline nanostructure
US12432985B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 27, 2021 |
| Grant date | Sep 30, 2025 |
| Priority date | — |
| Expiry date | Oct 24, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/834
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure comprises a semiconductor substrate having a top layer and one or more semiconductor monocrystalline nanostructures. Each nanostructure has a first and a second extremity defining an axis parallel to the top surface of the semiconductor substrate and separated therefrom by a distance, and a source structure epitaxially grown on the first extremity and a drain structure epitaxially grown on the second extremity. The source and drain structures are made of a p-doped (or alternatively n-doped) semiconductor monocrystalline material having a smaller (or alternatively larger) unstrained lattice constant than the unstrained lattice constant of the semiconductor monocrystalline material making the semiconductor monocrystalline nanostructure on which they are grown, thereby creating compressive (or alternatively tensile) strain in that semiconductor monocrystalline nanostructure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.