Erasable programmable read-only memory
US3938108A · kind A · utility
24Cited by
6References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 3, 1975 |
| Grant date | Feb 10, 1976 |
| Priority date | — |
| Expiry date | Feb 3, 1995 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/09445
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A TTL compatible erasable programmable read-only memory (PROM) which uses a single n-channel device having a floating gate for each memory cell. The entire memory including the periphery circuits, are disposed on a silicon substrate. Only a single externally generated high voltage input or "pin" is required for programming.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.