Inventor · Fremont, CA, US

George Perlegos

16Patents
13h-index
11Co-inventors
67Inventor score

Filing activity: Feb 3, 1975 → Oct 28, 1983

Most-cited inventions

PatentTitleAreaCited byStatus
US4203158A Electrically programmable and erasable MOS floating gate memory device employing tunneling and method of fabricating same Electricity 249 Expired
US4223394A Sensing amplifier for floating gate memory devices Physics 71 Expired
US4546454A Non-volatile memory cell fuse element Electricity 46 Expired
US4266283A Electrically alterable read-mostly memory Physics 37 Expired
US4538245A Enabling circuit for redundant word lines in a semiconductor memory array Physics 31 Expired
US4114255A Floating gate storage device and method of fabrication Electricity 31 Expired
US4558344A Electrically-programmable and electrically-erasable MOS memory device Physics 30 Expired
US4094012A Electrically programmable MOS read-only memory with isolated decoders Physics 29 Expired
US4519849A Method of making EPROM cell with reduced programming voltage Electricity 27 Expired
US3938108A Erasable programmable read-only memory Electricity 24 Expired
US4535259A Sense amplifier for use with a semiconductor memory array Physics 21 Expired
US4103189A MOS Buffer circuit Physics 17 Expired
US4264828A MOS Static decoding circuit Electricity 15 Expired
US4768169A Fault-tolerant memory array Physics 12 Expired
US4412310A EPROM Cell with reduced programming voltage and method of fabrication Electricity 10 Expired
US4489401A Electrical partitioning scheme for improving yields during the manufacture of semiconductor memory arrays Physics 8 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.