Method of mounting semiconductor chips
US3964157A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 31, 1974 |
| Grant date | Jun 22, 1976 |
| Priority date | — |
| Expiry date | Oct 31, 1994 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/853
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Disclosed is a bonding and packaging scheme for semiconductor device chips with particular application to semiconductor monolithic display chips. The display chip is bonded face down in a recess formed in a transparent substrate. In one embodiment, the metallization on the chip is aligned and made coplanar with the auxiliary metallization on the substrate, and the gap between the metallizations is bridged by a conductive material. This can be accomplished, for example, by solder reflow or epoxy bonding techniques. In an alternative embodiment, the metallization is formed after the chip is bonded to the substrate utilizing a coating which fills the gap between the chip and the substrate. The substrate may be dyed to act as a contrast filter, and a magnifying lens may be molded thereon in further processing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.