Slaving calculator chips
US3970995A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 27, 1974 |
| Grant date | Jul 20, 1976 |
| Priority date | — |
| Expiry date | Feb 27, 1994 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electronic calculator or data processing system implemented on semi-conductor chips to operate several chips in synchronism where at least one element common to the operation of all chips is responsive to sequentially generated operating states. A master clock applies clock pulses to the clock input terminal of one chip. A control gate is provided in the circuit leading to the clock input terminals of the other chip or chips. A comparator is connected to selected operating state output terminals from both or all of said chips and is connected to the control gate for inhibiting flow of clock signals to the other chip or chips so long as said selected states differ.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.