Semiconductor devices
US3983572A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 18, 1974 |
| Grant date | Sep 28, 1976 |
| Priority date | — |
| Expiry date | Oct 18, 1994 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention is concerned with methods for producing improved semiconductor devices. The invention is advantageously employable in the fabrication of insulated-gate field-effect transistor devices. The problem of accurately aligning the gate electrode over the channel region, lying between the source region and the drain region of a field effect transistor, is particularly addressed and solved. Accurate and precise field protection of all areas of the field-effect transistor surrounding the channel, source and drain regions is simply and effectively accomplished. The proper alignment of the gate electrode is largely accomplished by utilizing essentially the same mask structure to define the gate, source and drain regions. The same mask structure is utilized to define the area that is field protected.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.