Multilayer ceramic substrate structure
US3999004A · kind A · utility
37Cited by
4References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 27, 1974 |
| Grant date | Dec 21, 1976 |
| Priority date | — |
| Expiry date | Sep 27, 1994 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/159
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
This is a microelectronic multilayer circuit structure having circuit compatibility encapsulated within the circuit package including conductive electrical interconnection means formed by uniquely metallizing the "via" and/or blind interconnection holes within the circuit package. The assembly process provides means of uniformly metallizing the interlayer connecting holes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.