Semiconductor package and method of manufacture thereof
US4012766A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 8, 1975 |
| Grant date | Mar 15, 1977 |
| Priority date | — |
| Expiry date | Oct 8, 1995 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49121
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An improved plastic package and method of manufacture thereof for use in packaging integrated circuit semiconductor devices and the like. A transfer molded package having the lead frame disposed therein is formed having an opening therethrough. The device to be packaged is mounted on a stepped mounting member which then is located with respect to the opening with the height of the step being selected to generally dispose the top surface of the device substantially co-planar with the adjacent leads of the package. Sealing of the package may be accomplished by potting the upper and lower cavities of the opening in the plastic package, or by potting or cementing over a cup above the device so the space immediately above the device remains unfilled after sealing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.