Semiconductor device and a method for fabricating the same
US4021835A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 27, 1975 |
| Grant date | May 3, 1977 |
| Priority date | — |
| Expiry date | Jan 27, 1995 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/637
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A MOS-FET (Metal-Oxide-Semiconductor Field Effect Transistor) comprises a semiconductor body, source and drain regions disposed in the body at portions separated from each other, a second semiconductor region having a higher impurity concentration than that of the body, formed by ion implantation in the body between the source and drain regions, a first semiconductor region having a lower impurity concentration than that of the second semiconductor region but a higher impurity concentration than that of the body, and having an opposite conductivity type to that of the second semiconductor region, formed by ion implantation, so that the second semiconductor region is very thin, and which has a very small amount of a minute current, that is a tailing current.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.