Electrically programmable MOS read-only memory with isolated decoders
US4094012A · kind A · utility
29Cited by
3References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 1, 1976 |
| Grant date | Jun 6, 1978 |
| Priority date | — |
| Expiry date | Oct 1, 1996 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A programmable and erasable MOS read-only memory employing floating gate memory cells. Unique, compact decoders allow the high voltage programming signal to be fully decoded without exposing the decoding transistors to the high voltage. The memory employs field-effect transistors having four different voltage thresholds. One such device is employed in the sense amplifiers to provide compensation for process variations and another device is used to allow the output buffers to be readily "powered-down".
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.