Process of fabricating junction isolated IGFET and bipolar transistor integrated circuit by diffusion
US4120707A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 30, 1977 |
| Grant date | Oct 17, 1978 |
| Priority date | — |
| Expiry date | Mar 30, 1997 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/85
Abstract
A high voltage junction isolated integrated circuit having complementary insulated gate field effect and PNP transistors wherein low impurity gradient and concentration N-type source and drain regions of the N-channel device and base region of the PNP are formed in even lower impurity gradient and concentration P-type body regions and collector region respectively which are in an N-substrate. The process includes diffusing P-type regions in said N-type substrate to form a low impurity gradient and concentration body and collector, diffusing N-type regions in said P-type regions to form a low impurity gradient and concentration source, drain and base, diffusing P-type regions in said N-type base region to form a high impurity gradient and concentration emitter and in said substrates to form a high impurity gradient and concentration source and drain, and diffusing N-type regions in said N-type base, source and drain regions to form high impurity gradient and concentration contacts.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.