Method of making silicon on sapphire field effect transistors with specifically aligned gates
US4131496A · kind A · utility
24Cited by
9References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 15, 1977 |
| Grant date | Dec 26, 1978 |
| Priority date | — |
| Expiry date | Dec 15, 1997 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/982
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The method comprises forming a blind hole in a sapphire substrate using a sulfur hexafluoride gas etchant and an etch mask comprising a single layer of silicon nitride. The blind holes are filled with epitaxially grown silicon and field effect transistors are laid out with their gates orthogonal to a line which is at a 45.degree. angle to a standard wafer flat, i.e. orthogonal to the projection of the "c" axis onto the "r" plane of the sapphire wafer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.