Passivation of metallized semiconductor substrates

US4134125A · kind A · utility

Assignee

• Bell Telephone Laboratories, Inc. · US

Inventors

• Arthur C. Adams · Berkeley Heights, US
• Cesar D. Capio · Fords, US
• Hyman J. Levinstein · Berkeley Heights, US
• Shyam P. Murarka · Clifton Park, US

Key dates

• Filing date: Jul 20, 1977
• Grant date: Jan 9, 1979
• Expiry date: Jul 20, 1997

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/3011
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Disclosed is a method and structure for protecting circuit components from the ambient and in particular for protecting the contact metal from the adverse effects of moisture. A first layer of amorphous silicon is deposited over the circuit including the metal contacts. A second layer which may be silicon nitride or silicon dioxide is then deposited over the amorphous silicon. The amorphous silicon layer reduces cracking in the second layer and prevents cracks in the second layer from propagating to the circuit components.