Method of limiting stacking faults in oxidized silicon wafers
US4149905A · kind A · utility
20Cited by
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2Claims
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Assignee
Inventors
Key dates
| Filing date | Dec 27, 1977 |
| Grant date | Apr 17, 1979 |
| Priority date | — |
| Expiry date | Dec 27, 1997 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/024
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Many of the stacking faults which occur after oxidation of silicon wafers are substantially eliminated by the use of an argon-hydrochloric anneal of the wafers just prior to oxidation. This anneal, which is carried out in the same chamber in which oxidation is carried out, removes impurities from the surface of the wafers and thereby limits the sites at which stacking faults form after oxidation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.