Integrated circuit using an insulated gate field effect transistor
US4153906A · kind A · utility
3Cited by
0References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 22, 1977 |
| Grant date | May 8, 1979 |
| Priority date | — |
| Expiry date | Nov 22, 1997 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/83
Abstract
This disclosure relates to an integrated circuit using an insulated gate field effect transistor of the punch-through type for use in high speed electronic computation. Until now the punch-through phenomena has been considered a defect in the insulated gate field effect transistor. However, the effective utilization of the punch-through phenomena is achieved by using a specially designed insulated gate field effect transistor having a selected structure or material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.