Heterojunction confinement field effect transistor
US4157556A · kind A · utility
23Cited by
3References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 6, 1977 |
| Grant date | Jun 5, 1979 |
| Priority date | — |
| Expiry date | Jan 6, 1997 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/824
Abstract
An improved field-effect transistor is provided by forming the conducting channel boundary opposite the gate electrode as a heterojunction. For example a GaAs conducting channel may be bounded by an AlGaAs layer. The conduction electrons can penetrate the boundary very little and are constrained to the channel layer having good transport properties. The output conductance is reduced and the transconductance increased.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.