Wafer edge detection system
US4158171A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 14, 1977 |
| Grant date | Jun 12, 1979 |
| Priority date | — |
| Expiry date | Sep 14, 1997 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/316
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A noncontact gauge for edge detecting of semiconductor wafers in a test rig which indexes between circuits in the semiconductor wafer to provide functional tests upon them. The noncontact gauge includes a capacitive probe having an elongated finger that is bent into position a few thousands of an inch above the wafer when positioned for circuit tests in order to detect whether the circuit test system, in indexing from circuit to circuit in the row and column matrix of integrated circuit chips in the wafer, has moved to one edge or the other of the water. The edge detection system operates with conventional wafer test systems which raise and lower the wafer between tests to index from one integrated circuit to the next in the wafer matrix. When the wafer is in the down position, the circuitry, which includes an automatic compensation system, changes modes to calibrate the edge detector circuit for a predetermined capacitance representative of capacitance sensed by the finger of the probe when the wafer is moved out of proximity. Additionally, the circuitry and in particular the energization for the capacitive probe, is de-energized for a portion of the period when the wafer is in po…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.