Fabrication of patterned silicon nitride insulating layers having gently sloping sidewalls
US4181564A · kind A · utility
17Cited by
11References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 24, 1978 |
| Grant date | Jan 1, 1980 |
| Priority date | — |
| Expiry date | Apr 24, 1998 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/978
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming patterned insulating layers such as silicon nitride for use in integrated circuit fabrication is disclosed. The insulating layer is formed by reactive plasma deposition while the temperature of the substrate is decreased. This diminishing temperature affects the etching characteristics of the layer such that when openings are formed by a selective plasma etching, the sidewalls will be sloped at an acute angle with the substrate even when the layer is overetched.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.