Insulated gate field effect silicon-on-sapphire transistor and method of making same
US4199773A · kind A · utility
54Cited by
2References
10Claims
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Assignee
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Key dates
| Filing date | Aug 29, 1978 |
| Grant date | Apr 22, 1980 |
| Priority date | — |
| Expiry date | Aug 29, 1998 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/03
Abstract
A silicon-on-sapphire structure and method for forming the same is described wherein the leakage current attributable to "back channel" leakage is minimized by forming the channel region in such a manner as to have provided therein at least two levels of dopant concentration. The heavier level of dopant concentration is positioned adjacent the silicon/sapphire interface while the lighter level of dopant concentration occupies the remainder of the channel region and is shallower than the heavier level. The classic inversion process takes place in the lightly doped section at the shallow level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.