Integrated amplifier with adjustable offset voltage
US4210875A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 29, 1978 |
| Grant date | Jul 1, 1980 |
| Priority date | — |
| Expiry date | Dec 29, 1998 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45394
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An operational amplifier including two parallel transistors in each of the two current paths with one of the transistors being connected to the current path by a fusible element and the other transistor being connected to the path by an impedance which does not affect the overall operation of the current path during normal operation with the current in the first direction and steers the current in the opposite direction towards the fusible element to blow the fusible element by forward biasing a normally reversed biased junction. Using bipolar transistors, the base-collector junction is forward biased to blow the fusible element. A single junction field effect transistor can be used having a plurality of parallel drain segments and the gate-drain junction is forward biased.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.