Process for making large area isolation trenches utilizing a two-step selective etching technique
US4211582A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 28, 1979 |
| Grant date | Jul 8, 1980 |
| Priority date | — |
| Expiry date | Jun 28, 1999 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/111
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for making wide, deep recessed oxide isolation trenches in silicon semiconductor substrates. A semi-conductor substrate is selectively etched to produce a spaced succession of narrow, shallow trenches separated by narrow silicon mesas. Silicon oxide is chemical-vapor-deposited on the horizontal and vertical surfaces of the etched structure to a thickness equalling the width of a desired silicon oxide mask. The mask is used for etching multiple deep trenches in the substrate, the trenches being separated by thin walls of silicon. The thickness of the walls is uniformly equal to and determined by the thickness of the deposited silicon oxide mask. The deposited silicon oxide is reactively ion etched away from the horizontal surfaces, leaving the oxide only on the sidewalls of the shallow trenches. The silicon is deeply etched, using the remaining oxide as a mask. Boron is ion implanted and the resulting structure is thermally oxidized sufficiently to completely oxidize the silicon under the deposited oxide mask and to oxidize the silicon surfaces at the bottoms of the trenches. The remaining trench volume is filled in with chemical-vapor-deposited silicon dioxide.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.