Technique for controlling emitter ballast resistance
US4231059A · kind A · utility
16Cited by
6References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 1, 1978 |
| Grant date | Oct 28, 1980 |
| Priority date | — |
| Expiry date | Nov 1, 1998 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19043
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A transistor in which this effective emitter resistance which is determined by the geometry of the emitter metallization as disclosed. In the preferred embodiment, the emitter metallization comprises a series of circular "dots" which are distributed over the entire emitter area. The area of the "dots" with respect to the entire emitter area is selected such that the desired effective emitter resistance is achieved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.