CMOS process
US4282648A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 24, 1980 |
| Grant date | Aug 11, 1981 |
| Priority date | — |
| Expiry date | Mar 24, 2000 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/117
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A CMOS Process for fabricating channel stops which are substantially formed as a by-product of growing a field oxide is described. A p-type region is formed at an edge (or edges) of an n-type well through an opening in a silicon nitride layer. An oxide is grown at the opening. As the oxide grows, n-type dopant from the n-type well accumulates at the edge of the oxide, forming a more highly doped n-type region. Simultaneously, an adjacent p-type region is formed under the oxide from the p-type dopant. The process also permits easy fabrication of a buried contact to the p-channel device thus eliminating the need for a metal contact when forming a bistable circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.