Mark Bohr
164Patents
28h-index
147Co-inventors
93Inventor score
Filing activity: Mar 24, 1980 → Mar 25, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7491988B2 | Transistors with increased mobility in the channel zone and method of fabrication | Electricity | 133 | Expired |
| US8436404B2 | Self-aligned contacts | Electricity | 132 | Active |
| US6653563B2 | Alternate bump metallurgy bars for power and ground routing | Electricity | 98 | Expired |
| US7494858B2 | Transistor with improved tip profile and method of manufacture thereof | Electricity | 92 | Expired |
| US5536675A | Isolation structure formation for semiconductor circuit fabrication | Emerging Cross-Sectional Technologies | 81 | Expired |
| US5708291A | Silicide agglomeration fuse device | Electricity | 71 | Expired |
| US6671947B2 | Method of making an interposer | Emerging Cross-Sectional Technologies | 70 | Expired |
| US6617681B1 | Interposer and method of making same | Emerging Cross-Sectional Technologies | 68 | Expired |
| US6919238B2 | Silicon on insulator (SOI) transistor and methods of fabrication | Electricity | 65 | Expired |
| US6143638A | Passivation structure and its method of fabrication | Electricity | 56 | Expired |
| US6258700A | Silicide agglomeration fuse device | Electricity | 53 | Expired |
| US6624032B2 | Structure and process flow for fabrication of dual gate floating body integrated MOS transistors | Electricity | 51 | Expired |
| US9461143B2 | Gate contact structure over active gate and method to fabricate same | Electricity | 50 | Active |
| US4372034A | Process for forming contact openings through oxide layers | Electricity | 50 | Expired |
| US8258057B2 | Copper-filled trench contact for transistor performance improvement | Electricity | 49 | Active |
| US4282648A | CMOS process | Emerging Cross-Sectional Technologies | 48 | Expired |
| US5969404A | Silicide agglomeration device | Electricity | 47 | Expired |
| US6020244A | Channel dopant implantation with automatic compensation for variations in critical dimension | Electricity | 47 | Expired |
| US6392271B1 | Structure and process flow for fabrication of dual gate floating body integrated MOS transistors | Electricity | 43 | Expired |
| US5091332A | Semiconductor field oxidation process | Electricity | 43 | Expired |
| US6337507B1 | Silicide agglomeration fuse device with notches to enhance programmability | Electricity | 42 | Expired |
| US5734187A | Memory cell design with vertically stacked crossovers | Emerging Cross-Sectional Technologies | 41 | Expired |
| US7276801B2 | Designs and methods for conductive bumps | Electricity | 41 | Expired |
| US4536947A | CMOS process for fabricating integrated circuits, particularly dynamic memory cells with storage capacitors | Emerging Cross-Sectional Technologies | 40 | Expired |
| US5976939A | Low damage doping technique for self-aligned source and drain regions | Electricity | 38 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.